Component density in integrated circuits (ICs) has increased the complexity of IC layouts, and increased the likelihood of particular IC layout features causing systematic defects in ICs. However, it is not always obvious which particular IC layout features are more likely to result in systematic defects than other IC layout features.
There are various approaches used today to determine IC layout features that may potentially cause systematic defects, such as searching the IC layout for hotspots. However, not all hotspots result in systematic defects, and not all hotspots in an IC layout can, or should, be avoided. Consequently, hotspot detection done in isolation from actual defective ICs may result in spending time and effort “correcting” an IC layout feature that would not actually be likely to cause a systematic defect.
Another approach to diagnosing a defective IC involves physical failure analysis (PFA) of actual defective ICs to determine the causes of defects on an IC-by-IC basis, but in isolation it can be difficult or impossible to determine if a particular IC layout feature is systemically problematic, due to the low throughput of the PFA process and/or its inability to sometimes identify the defect.
Accordingly, there is a need for improved methods and systems for identifying IC layout features that result in systematic defects in an IC.